1. Field of the Invention
The present invention relates to the technical field of voltage level shift and, more particularly, to a wide range level shift system.
2. Description of Related Art
Generally, a voltage level shift circuit is used to transform a control signal with low voltage to a control signal with high voltage. For example, in the liquid crystal display application, it is generally required to transform a digital control signal from 0˜3.3 volts to −15˜20 volts so as to drive a thin film transistor. Thus, a voltage level shift circuit is used to proceed with voltage level shift.
FIG. 1 is a schematic diagram of a conventional voltage level shift circuit 100, which comprises two voltage level shifters 110,120. The first voltage level shifter 110 is provided to transform an input signal VIN from the level of VPP to VSS to the level of VPP to VGL, wherein VPP is approximately 3.3 volts, VSS is approximately 0 volt and VGL is approximately −15 volts. That is, the first voltage level shifter 110 maintains the input signal at VPP level first and then negatively transforms the voltage of the input signal VIN to VGL level.
The second voltage level shifter 120 is provided to transform a signal VOUT1 outputted by the first voltage level shifter 110 from the level of VPP to VGL to the level of VGH to VGL, wherein VGH is approximately 20 volts. That is, the second voltage level shifter 120 maintains the output signal at VGL level first and then positively transforms the voltage of VOUT1 to VGH level.
FIG. 2 is a schematic diagram of another conventional voltage level shift circuit 200, which is different from that of FIG. 1 in transforming the level of an input signal VIN from VPP˜VSS to VGH˜VSS and then transforming the level from VGH˜VSS to VGH˜VGL. As can be known from FIG. 1 and FIG. 2, a general voltage level shift circuit 100 requires at least eight transistors.
FIG. 3 is a schematic view illustrating an application to the conventional voltage level shift circuit 100. In a practical application of the voltage level shift circuit 100, in order to drive a next stage, it typically adds a PMOS transistor MPO and an NMOS transistor MNO for use as an output buffer stage to drive an output load. As input VIN changes the level, the PMOS transistor MPO and the NMOS transistor MNO are turned on at the same time, resulting in occurrence of rush current of VGHO and VGLO. To avoid such a situation, it is required to add two sets of inverter, respectively including a PMOS transistor MPS and an NMOS transistor MNW, and a PMOS transistor MPW and an NMOS transistor MNS. Wherein, a width/length ratio (W/L) of the transistor MPS is bigger and the width/length ratio of the transistor MNW is smaller, while the width/length ratio (W/L) of the transistor MPW is smaller and the width/length ratio of the transistor MNS is bigger.
As the input voltage VIN changes from the VSS level to the VPP level, a voltage VOP and a voltage VON decrease concurrently. Due to that the width/length ratio of the transistor MNS is bigger, the voltage VON decrease faster, resulting in that the transistor MNO is turned off first. Since the width/length ratio of the transistor MNW is smaller, the voltage VOP decrease slower, resulting in that the transistor MPO is turned on later, such that the output voltage VOUT is raised to the VGHO level. Therefore, there will be no such a situation that the transistor MPO and the transistor MNO are turned on at the same time. It can be known from FIG. 1 and FIG. 3 that it needs about twelve transistors for a conventional voltage level shift circuit and two inverters. Accordingly, it not only occupies a lot of size, but also increases much power consumption. Therefore, it is desirable to provide an improved wide range level shift system to mitigate and/or obviate the aforementioned problems.